1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device and, more particularly, to a semiconductor integrated circuit device capable of reading out chip-specific information during testing and evaluation.
2. Description of the Related Art
With advances in semiconductor manufacturing technology, the miniaturization of semiconductor integrated circuit devices has been advancing and their packing density increasing in recent years and, with this trend, it is required to reduce the chip area. To achieve this, there is a need to reduce as much as possible the long wiring used only for the testing and evaluation of the chip (the wiring is long compared with the chip internal wiring).
It is known in the prior art to provide a semiconductor integrated circuit device (chip) in which information specific to the chip is written using fuses or the like, allowing the information to be read out when testing and evaluating the chip. More specifically, in the prior art semiconductor integrated circuit device, the lot number, wafer number, chip number (code), etc. specific to the chip are written using fuses or the like, and binary data is input from the outside and compared with the internally stored binary data for verification of the chip-specific data such as the code.
The chip-specific lot number, wafer number, etc. are used, for example, to identify the lot, wafer, etc. associated with a defective chip discovered during testing, track down the semiconductor process that caused the defective chip, and so on.
The prior art and its associated problem will be described later, in detail, with reference to the accompanying drawings.